sky130_fd_sc_ms__dlymetal6s2s

6-inverter delay with output from 2nd stage on horizontal route

This is a stub of cell description file

  • Cell name: sky130_fd_sc_ms__dlymetal6s2s

  • Type: cell

  • Verilog name: sky130_fd_sc_ms__dlymetal6s2s

  • Library: sky130_fd_sc_ms

  • Inputs: 1 (A)

  • Outputs: 1 (X)

sky130_fd_sc_ms__dlymetal6s2s symbols

../../../../../_images/sky130_fd_sc_ms__dlymetal6s2s.symbol.svg
../../../../../_images/sky130_fd_sc_ms__dlymetal6s2s.pp.symbol.svg

sky130_fd_sc_ms__dlymetal6s2s schematic

../../../../../_images/sky130_fd_sc_ms__dlymetal6s2s.schematic.svg

sky130_fd_sc_ms__dlymetal6s2s GDSII layouts

../../../../../_images/sky130_fd_sc_ms__dlymetal6s2s_1.svg

sky130_fd_sc_ms__dlymetal6s2s_1