sky130_fd_sc_hs__dlrtn

Delay latch, inverted reset, inverted enable, single output

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hs__dlrtn

  • Type: cell

  • Verilog name: sky130_fd_sc_hs__dlrtn

  • Library: sky130_fd_sc_hs

  • Inputs: 3 (RESET_B, D, GATE_N)

  • Outputs: 1 (Q)

sky130_fd_sc_hs__dlrtn symbols

../../../../../_images/sky130_fd_sc_hs__dlrtn.symbol.svg
../../../../../_images/sky130_fd_sc_hs__dlrtn.pp.symbol.svg

sky130_fd_sc_hs__dlrtn schematic

contents/libraries/sky130_fd_sc_hs/cells/dlrtn/sky130_fd_sc_hs__dlrtn.schematic.svg

sky130_fd_sc_hs__dlrtn GDSII layouts

../../../../../_images/sky130_fd_sc_hs__dlrtn_1.svg

sky130_fd_sc_hs__dlrtn_1

../../../../../_images/sky130_fd_sc_hs__dlrtn_2.svg

sky130_fd_sc_hs__dlrtn_2

../../../../../_images/sky130_fd_sc_hs__dlrtn_4.svg

sky130_fd_sc_hs__dlrtn_4