sky130_fd_sc_hs__dlrtn¶
Delay latch, inverted reset, inverted enable, single output
This is a stub of cell description file
Cell name: sky130_fd_sc_hs__dlrtn
Type: cell
Verilog name: sky130_fd_sc_hs__dlrtn
Library: sky130_fd_sc_hs
Inputs: 3 (RESET_B, D, GATE_N)
Outputs: 1 (Q)