sky130_fd_sc_hdll__or3

3-input OR

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hdll__or3

  • Type: cell

  • Verilog name: sky130_fd_sc_hdll__or3

  • Library: sky130_fd_sc_hdll

  • Inputs: 3 (A, B, C)

  • Outputs: 1 (X)

sky130_fd_sc_hdll__or3 symbols

../../../../../_images/sky130_fd_sc_hdll__or3.symbol.svg
../../../../../_images/sky130_fd_sc_hdll__or3.pp.symbol.svg

sky130_fd_sc_hdll__or3 schematic

../../../../../_images/sky130_fd_sc_hdll__or3.schematic.svg

sky130_fd_sc_hdll__or3 GDSII layouts

../../../../../_images/sky130_fd_sc_hdll__or3_1.svg

sky130_fd_sc_hdll__or3_1

../../../../../_images/sky130_fd_sc_hdll__or3_2.svg

sky130_fd_sc_hdll__or3_2

../../../../../_images/sky130_fd_sc_hdll__or3_4.svg

sky130_fd_sc_hdll__or3_4