sky130_fd_sc_hd__sdfbbn¶
Scan delay flop, inverted set, inverted reset, inverted clock, complementary outputs
This is a stub of cell description file
Cell name: sky130_fd_sc_hd__sdfbbn
Type: cell
Verilog name: sky130_fd_sc_hd__sdfbbn
Library: sky130_fd_sc_hd
Inputs: 6 (D, SCD, SCE, CLK_N, SET_B, RESET_B)
Outputs: 2 (Q, Q_N)