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SkyWater SKY130 PDK Digital Design
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    google/skywater-pdk
      • Current Status
      • Version Number Format
    • Current Status
      • Documentation
          • Cadence Virtuoso Support
          • Mentor Calibre Support
        • sky130_fd_pr_base
        • sky130_fd_pr_rf
        • sky130_fd_pr_rf2
        • sky130_osu_sc - SKY130 Oklahoma State University provided standard cell library
        • sky130_fd_sp_flash - SKY130 Flash Build Space
        • sky130_fd_sp_sram - SKY130 SRAM Build Space
        • sky130_fd_io - SKY130 Foundry Provided IO Cells
        • sky130_ef_io - SKY130 eFabless Provided IO Cells
        • Using Mentor Calibre
        • Using Magic
      • Scripts and PDK Tooling
      • Background
      • Masks
        • Process Stack Diagram
        • General
        • Minimum Critical Dimensions
          • Basic Parameters
          • Junction Depths
          • Other Width Criteria
          • Punchthrough Criteria
          • Latch-up/ESD Criteria
          • Implant angles
        • Physical Criteria
        • Laser Fuse Criteria
        • Other criteria and parameters
        • Criteria for High Voltage FET
        • Criteria for polyimide manufacturability
        • Criteria for VPP capacitor
        • Layers Definitions
        • Auxiliary Layers
        • Devices and Layout vs Schematic (LVS) Information
        • GDS Layers Information
      • Device and Layout vs. Schematic
      • Summary of Key Periphery Rules
        • (x.-)
        • (dnwell.-)
        • (nwell.-)
        • (pwbm.-)
        • (pwdem.-)
        • (hvtp.-)
        • (hvtr.-)
        • (lvtn.-)
        • (ncm.-)
        • (difftap.-)
        • (tunm.-)
        • (poly.-)
        • (rpm.-)
        • (varac.-)
        • (photo.-)
        • (npc.-)
        • (n/ psd.-)
        • (licon.-)
        • (li.-.-)
        • (ct.-)
        • (capm.-)
        • (vpp.-)
        • (m1.-)
        • (via.-)
        • (m2.-)
        • (via2.-)
        • (m3.-)
        • (via3.-)
        • (nsm.-)
        • (indm.-)
        • (m4.-)
        • (via4.-)
        • (m5.-)
        • (pad.-)
        • (rdl.-)
        • (mf.-)
        • (hvi.-)
        • (hvnwell.-)
        • (hvdifftap.-)
        • (hvpoly.-)
        • (hvntm.-)
        • (denmos.-)
        • (depmos.-)
        • (extd.-)
        • (hv.-.-)
        • (vhvi.-.-)
        • (uhvi.-.-)
        • (ulvt-.-)
        • (pwres.-.-)
        • (rfdiode.-.-)
      • WLCSP Rules
        • Failure Mechanisms in High Voltage Devices
        • High Voltage Implementation Methodology
        • Failure Mechanisms in VHV Devices
        • VHV Implementation Methodology
        • Definitions
        • Tables
        • Resistance Rules
        • Resistance Values
        • Capacitance Rules
          • Basic Capacitance - Fringe Downward
          • Basic Capacitance - Fringe Upward
          • Basic Capacitance - Parallel
        • Discrepencies
          • Spice Model Information
          • Details
          • Spice Model Information
          • Details
          • Spice Model Information
          • Details
          • Spice Model Information
          • Details
          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
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          • Spice Model Information
          • Details
          • Spice Model Information
          • Details
          • Details
          • Spice Model Information
          • Spice Model Information
          • Spice Model Information
        • SONOS cells
        • Generic resistors
          • Spice Model Information
          • Details
          • Spice Model Information
          • Details
          • Spice Model Information
          • Details
          • Spice Model Information
          • Details
      • Error Messages
        • Library Naming
        • Creating New Libraries
          • Foundry provided
          • Foundry provided Digital Standard Cell Libraries
          • Third party provided Digital Standard Cell Libraries
          • Foundry provided Build Space Libraries
          • Foundry provided IO and Periphery Libraries
          • Third party provided IO and Periphery Libraries
      • File Types
      • With Cadence Virtuoso
      • With MAGIC
      • With Klayout
      • With Berkeley Analog Generator (BAG)
      • With FASoC
      • With your design flow?
      • With Cadence Innovus
      • With OpenROAD
      • With your design flow?
      • With Cadence Spectre
      • With ngspice
      • With your design flow?
        • With Mentor Calibre
        • With Magic
        • With KLayout
        • With Mentor Calibre
        • With Magic
        • With KLayout
        • With Mentor Calibre
        • With Magic
        • With KLayout
      • TODO: Calibre Decks
      • TODO: MAGIC Decks
        • Submodules
          • Cell
          • Library
          • LibraryNode
          • LibrarySource
          • LibraryType
          • LibraryVersion
          • parse_filename()
          • parse_pathname()
          • Corner
          • CornerFlag
          • CornerType
          • OptionalTuple
          • parse_filename()
          • CellSize
          • CellSizeLowPower
          • CellSizeMinimum
          • CellSizeNumeric
          • InvalidSuffixError
          • parse_size()
          • OrderedFlag
          • comparable_to_none()
          • dataclass_json_passthru_config()
          • dataclass_json_passthru_sequence_config()
          • extract_numbers()
          • sortable_extracted_numbers()
        • Module contents
    • Previous Nomenclature
    • Glossary
      • Contributor License Agreement
      • Code reviews
        • Resolve peacefully
        • Reporting problems
      • Open Source SkyWater PDK
      • Open Source MPW Shuttle Program
      • Industry partners
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    • References
    • Show Source

    Digital DesignΒΆ

    Digital Design

    • With Cadence Innovus
    • With OpenROAD
    • With your design flow?
    Previous TODO: analog/new
    Next TODO: digital/innovus
    GitHub
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    © Copyright 2020, SkyWater PDK Authors.
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