sky130_fd_sc_ms__or4b¶
4-input OR, first input inverted
This is a stub of cell description file
Cell name: sky130_fd_sc_ms__or4b
Type: cell
Verilog name: sky130_fd_sc_ms__or4b
Library: sky130_fd_sc_ms
Inputs: 4 (A, B, C, D_N)
Outputs: 1 (X)
4-input OR, first input inverted
This is a stub of cell description file
Cell name: sky130_fd_sc_ms__or4b
Type: cell
Verilog name: sky130_fd_sc_ms__or4b
Library: sky130_fd_sc_ms
Inputs: 4 (A, B, C, D_N)
Outputs: 1 (X)