sky130_fd_sc_ms__fahcon¶
Full adder, inverted carry in, inverted carry out
This is a stub of cell description file
Cell name: sky130_fd_sc_ms__fahcon
Type: cell
Verilog name: sky130_fd_sc_ms__fahcon
Library: sky130_fd_sc_ms
Inputs: 3 (A, B, CI)
Outputs: 2 (COUT_N, SUM)