sky130_fd_sc_ls__sedfxbp

Scan delay flop, data enable, non-inverted clock, complementary outputs

This is a stub of cell description file

  • Cell name: sky130_fd_sc_ls__sedfxbp

  • Type: cell

  • Verilog name: sky130_fd_sc_ls__sedfxbp

  • Library: sky130_fd_sc_ls

  • Inputs: 5 (CLK, D, DE, SCD, SCE)

  • Outputs: 2 (Q, Q_N)

sky130_fd_sc_ls__sedfxbp symbols

../../../../../_images/sky130_fd_sc_ls__sedfxbp.symbol.svg
../../../../../_images/sky130_fd_sc_ls__sedfxbp.pp.symbol.svg

sky130_fd_sc_ls__sedfxbp schematic

../../../../../_images/sky130_fd_sc_ls__sedfxbp.schematic.svg

sky130_fd_sc_ls__sedfxbp GDSII layouts

../../../../../_images/sky130_fd_sc_ls__sedfxbp_1.svg

sky130_fd_sc_ls__sedfxbp_1

../../../../../_images/sky130_fd_sc_ls__sedfxbp_2.svg

sky130_fd_sc_ls__sedfxbp_2