sky130_fd_sc_ls__sdfbbp¶
Scan delay flop, inverted set, inverted reset, non-inverted clock, complementary outputs
This is a stub of cell description file
Cell name: sky130_fd_sc_ls__sdfbbp
Type: cell
Verilog name: sky130_fd_sc_ls__sdfbbp
Library: sky130_fd_sc_ls
Inputs: 6 (D, SCD, SCE, CLK, SET_B, RESET_B)
Outputs: 2 (Q, Q_N)