sky130_fd_sc_ls__o311a¶
3-input OR into 3-input AND
This is a stub of cell description file
Cell name: sky130_fd_sc_ls__o311a
Type: cell
Verilog name: sky130_fd_sc_ls__o311a
Library: sky130_fd_sc_ls
Inputs: 5 (A1, A2, A3, B1, C1)
Outputs: 1 (X)
3-input OR into 3-input AND
This is a stub of cell description file
Cell name: sky130_fd_sc_ls__o311a
Type: cell
Verilog name: sky130_fd_sc_ls__o311a
Library: sky130_fd_sc_ls
Inputs: 5 (A1, A2, A3, B1, C1)
Outputs: 1 (X)