sky130_fd_sc_ls__dfrtn¶
Delay flop, inverted reset, inverted clock, complementary outputs
This is a stub of cell description file
Cell name: sky130_fd_sc_ls__dfrtn
Type: cell
Verilog name: sky130_fd_sc_ls__dfrtn
Library: sky130_fd_sc_ls
Inputs: 3 (CLK_N, D, RESET_B)
Outputs: 1 (Q)