sky130_fd_sc_hs__sdfrbp¶
Scan delay flop, inverted reset, non-inverted clock, complementary outputs
This is a stub of cell description file
Cell name: sky130_fd_sc_hs__sdfrbp
Type: cell
Verilog name: sky130_fd_sc_hs__sdfrbp
Library: sky130_fd_sc_hs
Inputs: 5 (RESET_B, CLK, D, SCD, SCE)
Outputs: 2 (Q, Q_N)