sky130_fd_sc_hs__dlxbp¶
Delay latch, non-inverted enable, complementary outputs
This is a stub of cell description file
Cell name: sky130_fd_sc_hs__dlxbp
Type: cell
Verilog name: sky130_fd_sc_hs__dlxbp
Library: sky130_fd_sc_hs
Inputs: 2 (D, GATE)
Outputs: 2 (Q, Q_N)
sky130_fd_sc_hs__dlxbp symbols¶
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sky130_fd_sc_hs__dlxbp schematic¶
sky130_fd_sc_hs__dlxbp GDSII layouts¶
sky130_fd_sc_hs__dlxbp_1¶