sky130_fd_sc_hs__dlrbp¶
Delay latch, inverted reset, non-inverted enable, complementary outputs
This is a stub of cell description file
Cell name: sky130_fd_sc_hs__dlrbp
Type: cell
Verilog name: sky130_fd_sc_hs__dlrbp
Library: sky130_fd_sc_hs
Inputs: 3 (RESET_B, D, GATE)
Outputs: 2 (Q, Q_N)
sky130_fd_sc_hs__dlrbp symbols¶
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sky130_fd_sc_hs__dlrbp schematic¶
sky130_fd_sc_hs__dlrbp GDSII layouts¶
sky130_fd_sc_hs__dlrbp_1¶
sky130_fd_sc_hs__dlrbp_2¶