sky130_fd_sc_hdll__or2¶
2-input OR
This is a stub of cell description file
Cell name: sky130_fd_sc_hdll__or2
Type: cell
Verilog name: sky130_fd_sc_hdll__or2
Library: sky130_fd_sc_hdll
Inputs: 2 (A, B)
Outputs: 1 (X)
2-input OR
This is a stub of cell description file
Cell name: sky130_fd_sc_hdll__or2
Type: cell
Verilog name: sky130_fd_sc_hdll__or2
Library: sky130_fd_sc_hdll
Inputs: 2 (A, B)
Outputs: 1 (X)