sky130_fd_sc_hdll__o21ai

2-input OR into first input of 2-input NAND

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hdll__o21ai

  • Type: cell

  • Verilog name: sky130_fd_sc_hdll__o21ai

  • Library: sky130_fd_sc_hdll

  • Inputs: 3 (A1, A2, B1)

  • Outputs: 1 (Y)

sky130_fd_sc_hdll__o21ai symbols

../../../../../_images/sky130_fd_sc_hdll__o21ai.symbol.svg
../../../../../_images/sky130_fd_sc_hdll__o21ai.pp.symbol.svg

sky130_fd_sc_hdll__o21ai schematic

../../../../../_images/sky130_fd_sc_hdll__o21ai.schematic.svg

sky130_fd_sc_hdll__o21ai GDSII layouts

../../../../../_images/sky130_fd_sc_hdll__o21ai_1.svg

sky130_fd_sc_hdll__o21ai_1

../../../../../_images/sky130_fd_sc_hdll__o21ai_2.svg

sky130_fd_sc_hdll__o21ai_2

../../../../../_images/sky130_fd_sc_hdll__o21ai_4.svg

sky130_fd_sc_hdll__o21ai_4