sky130_fd_sc_hdll__o21a

2-input OR into first input of 2-input AND

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hdll__o21a

  • Type: cell

  • Verilog name: sky130_fd_sc_hdll__o21a

  • Library: sky130_fd_sc_hdll

  • Inputs: 3 (A1, A2, B1)

  • Outputs: 1 (X)

sky130_fd_sc_hdll__o21a symbols

../../../../../_images/sky130_fd_sc_hdll__o21a.symbol.svg
../../../../../_images/sky130_fd_sc_hdll__o21a.pp.symbol.svg

sky130_fd_sc_hdll__o21a schematic

../../../../../_images/sky130_fd_sc_hdll__o21a.schematic.svg

sky130_fd_sc_hdll__o21a GDSII layouts

../../../../../_images/sky130_fd_sc_hdll__o21a_1.svg

sky130_fd_sc_hdll__o21a_1

../../../../../_images/sky130_fd_sc_hdll__o21a_2.svg

sky130_fd_sc_hdll__o21a_2

../../../../../_images/sky130_fd_sc_hdll__o21a_4.svg

sky130_fd_sc_hdll__o21a_4