sky130_fd_sc_hdll__o21a¶
2-input OR into first input of 2-input AND
This is a stub of cell description file
Cell name: sky130_fd_sc_hdll__o21a
Type: cell
Verilog name: sky130_fd_sc_hdll__o21a
Library: sky130_fd_sc_hdll
Inputs: 3 (A1, A2, B1)
Outputs: 1 (X)