sky130_fd_sc_hdll__o211a¶
2-input OR into first input of 3-input AND
This is a stub of cell description file
Cell name: sky130_fd_sc_hdll__o211a
Type: cell
Verilog name: sky130_fd_sc_hdll__o211a
Library: sky130_fd_sc_hdll
Inputs: 4 (A1, A2, B1, C1)
Outputs: 1 (X)