sky130_fd_sc_hdll__a222oi

2-input AND into all inputs of 3-input NOR

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hdll__a222oi

  • Type: cell

  • Verilog name: sky130_fd_sc_hdll__a222oi

  • Library: sky130_fd_sc_hdll

  • Inputs: 6 (A1, A2, B1, B2, C1, C2)

  • Outputs: 1 (Y)

sky130_fd_sc_hdll__a222oi symbols

../../../../../_images/sky130_fd_sc_hdll__a222oi.symbol.svg
../../../../../_images/sky130_fd_sc_hdll__a222oi.pp.symbol.svg

sky130_fd_sc_hdll__a222oi schematic

../../../../../_images/sky130_fd_sc_hdll__a222oi.schematic.svg

sky130_fd_sc_hdll__a222oi GDSII layouts

../../../../../_images/sky130_fd_sc_hdll__a222oi_1.svg

sky130_fd_sc_hdll__a222oi_1