sky130_fd_sc_hd__tapvpwrvgnd¶
Substrate and well tap cell
This is a stub of cell description file
Cell name: sky130_fd_sc_hd__tapvpwrvgnd
Type: cell
Verilog name: sky130_fd_sc_hd__tapvpwrvgnd
Library: sky130_fd_sc_hd
Inputs: 0 ()
Outputs: 0 ()
sky130_fd_sc_hd__tapvpwrvgnd symbols¶
sky130_fd_sc_hd__tapvpwrvgnd schematic¶
sky130_fd_sc_hd__tapvpwrvgnd GDSII layouts¶
sky130_fd_sc_hd__tapvpwrvgnd_1¶