sky130_fd_sc_hd__o32a

3-input OR and 2-input OR into 2-input AND

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hd__o32a

  • Type: cell

  • Verilog name: sky130_fd_sc_hd__o32a

  • Library: sky130_fd_sc_hd

  • Inputs: 5 (A1, A2, A3, B1, B2)

  • Outputs: 1 (X)

sky130_fd_sc_hd__o32a symbols

../../../../../_images/sky130_fd_sc_hd__o32a.symbol.svg
../../../../../_images/sky130_fd_sc_hd__o32a.pp.symbol.svg

sky130_fd_sc_hd__o32a schematic

../../../../../_images/sky130_fd_sc_hd__o32a.schematic.svg

sky130_fd_sc_hd__o32a GDSII layouts

../../../../../_images/sky130_fd_sc_hd__o32a_1.svg

sky130_fd_sc_hd__o32a_1

../../../../../_images/sky130_fd_sc_hd__o32a_2.svg

sky130_fd_sc_hd__o32a_2

../../../../../_images/sky130_fd_sc_hd__o32a_4.svg

sky130_fd_sc_hd__o32a_4