sky130_fd_sc_hd__mux2i

2-input multiplexer, output inverted

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hd__mux2i

  • Type: cell

  • Verilog name: sky130_fd_sc_hd__mux2i

  • Library: sky130_fd_sc_hd

  • Inputs: 3 (A0, A1, S)

  • Outputs: 1 (Y)

sky130_fd_sc_hd__mux2i symbols

../../../../../_images/sky130_fd_sc_hd__mux2i.symbol.svg
../../../../../_images/sky130_fd_sc_hd__mux2i.pp.symbol.svg

sky130_fd_sc_hd__mux2i schematic

../../../../../_images/sky130_fd_sc_hd__mux2i.schematic.svg

sky130_fd_sc_hd__mux2i GDSII layouts

../../../../../_images/sky130_fd_sc_hd__mux2i_1.svg

sky130_fd_sc_hd__mux2i_1

../../../../../_images/sky130_fd_sc_hd__mux2i_2.svg

sky130_fd_sc_hd__mux2i_2

../../../../../_images/sky130_fd_sc_hd__mux2i_4.svg

sky130_fd_sc_hd__mux2i_4