sky130_fd_sc_hd__dlymetal6s4s

6-inverter delay with output from 4th inverter on horizontal route

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hd__dlymetal6s4s

  • Type: cell

  • Verilog name: sky130_fd_sc_hd__dlymetal6s4s

  • Library: sky130_fd_sc_hd

  • Inputs: 1 (A)

  • Outputs: 1 (X)

sky130_fd_sc_hd__dlymetal6s4s symbols

../../../../../_images/sky130_fd_sc_hd__dlymetal6s4s.symbol.svg
../../../../../_images/sky130_fd_sc_hd__dlymetal6s4s.pp.symbol.svg

sky130_fd_sc_hd__dlymetal6s4s schematic

../../../../../_images/sky130_fd_sc_hd__dlymetal6s4s.schematic.svg

sky130_fd_sc_hd__dlymetal6s4s GDSII layouts

../../../../../_images/sky130_fd_sc_hd__dlymetal6s4s_1.svg

sky130_fd_sc_hd__dlymetal6s4s_1