sky130_fd_sc_hd__dlxbp

Delay latch, non-inverted enable, complementary outputs

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hd__dlxbp

  • Type: cell

  • Verilog name: sky130_fd_sc_hd__dlxbp

  • Library: sky130_fd_sc_hd

  • Inputs: 2 (D, GATE)

  • Outputs: 2 (Q, Q_N)

sky130_fd_sc_hd__dlxbp symbols

../../../../../_images/sky130_fd_sc_hd__dlxbp.symbol.svg
../../../../../_images/sky130_fd_sc_hd__dlxbp.pp.symbol.svg

sky130_fd_sc_hd__dlxbp schematic

../../../../../_images/sky130_fd_sc_hd__dlxbp.schematic.svg

sky130_fd_sc_hd__dlxbp GDSII layouts

../../../../../_images/sky130_fd_sc_hd__dlxbp_1.svg

sky130_fd_sc_hd__dlxbp_1