sky130_fd_sc_hd__dlrbp

Delay latch, inverted reset, non-inverted enable, complementary outputs

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hd__dlrbp

  • Type: cell

  • Verilog name: sky130_fd_sc_hd__dlrbp

  • Library: sky130_fd_sc_hd

  • Inputs: 3 (RESET_B, D, GATE)

  • Outputs: 2 (Q, Q_N)

sky130_fd_sc_hd__dlrbp symbols

../../../../../_images/sky130_fd_sc_hd__dlrbp.symbol.svg
../../../../../_images/sky130_fd_sc_hd__dlrbp.pp.symbol.svg

sky130_fd_sc_hd__dlrbp schematic

../../../../../_images/sky130_fd_sc_hd__dlrbp.schematic.svg

sky130_fd_sc_hd__dlrbp GDSII layouts

../../../../../_images/sky130_fd_sc_hd__dlrbp_1.svg

sky130_fd_sc_hd__dlrbp_1

../../../../../_images/sky130_fd_sc_hd__dlrbp_2.svg

sky130_fd_sc_hd__dlrbp_2