sky130_fd_sc_hd__dlrbn

Delay latch, inverted reset, inverted enable, complementary outputs

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hd__dlrbn

  • Type: cell

  • Verilog name: sky130_fd_sc_hd__dlrbn

  • Library: sky130_fd_sc_hd

  • Inputs: 3 (RESET_B, D, GATE_N)

  • Outputs: 2 (Q, Q_N)

sky130_fd_sc_hd__dlrbn symbols

../../../../../_images/sky130_fd_sc_hd__dlrbn.symbol.svg
../../../../../_images/sky130_fd_sc_hd__dlrbn.pp.symbol.svg

sky130_fd_sc_hd__dlrbn schematic

../../../../../_images/sky130_fd_sc_hd__dlrbn.schematic.svg

sky130_fd_sc_hd__dlrbn GDSII layouts

../../../../../_images/sky130_fd_sc_hd__dlrbn_1.svg

sky130_fd_sc_hd__dlrbn_1

../../../../../_images/sky130_fd_sc_hd__dlrbn_2.svg

sky130_fd_sc_hd__dlrbn_2