sky130_fd_sc_hd__dfrbp

Delay flop, inverted reset, complementary outputs

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hd__dfrbp

  • Type: cell

  • Verilog name: sky130_fd_sc_hd__dfrbp

  • Library: sky130_fd_sc_hd

  • Inputs: 3 (CLK, D, RESET_B)

  • Outputs: 2 (Q, Q_N)

sky130_fd_sc_hd__dfrbp symbols

../../../../../_images/sky130_fd_sc_hd__dfrbp.symbol.svg
../../../../../_images/sky130_fd_sc_hd__dfrbp.pp.symbol.svg

sky130_fd_sc_hd__dfrbp schematic

../../../../../_images/sky130_fd_sc_hd__dfrbp.schematic.svg

sky130_fd_sc_hd__dfrbp GDSII layouts

../../../../../_images/sky130_fd_sc_hd__dfrbp_1.svg

sky130_fd_sc_hd__dfrbp_1

../../../../../_images/sky130_fd_sc_hd__dfrbp_2.svg

sky130_fd_sc_hd__dfrbp_2