sky130_fd_sc_hd__dfbbp¶
Delay flop, inverted set, inverted reset, complementary outputs
This is a stub of cell description file
Cell name: sky130_fd_sc_hd__dfbbp
Type: cell
Verilog name: sky130_fd_sc_hd__dfbbp
Library: sky130_fd_sc_hd
Inputs: 4 (D, CLK, SET_B, RESET_B)
Outputs: 2 (Q, Q_N)