sky130_fd_sc_hd__and4b¶
4-input AND, first input inverted
This is a stub of cell description file
Cell name: sky130_fd_sc_hd__and4b
Type: cell
Verilog name: sky130_fd_sc_hd__and4b
Library: sky130_fd_sc_hd
Inputs: 4 (A_N, B, C, D)
Outputs: 1 (X)
sky130_fd_sc_hd__and4b symbols¶
sky130_fd_sc_hd__and4b schematic¶
sky130_fd_sc_hd__and4b GDSII layouts¶
sky130_fd_sc_hd__and4b_1¶
sky130_fd_sc_hd__and4b_2¶
sky130_fd_sc_hd__and4b_4¶