:cell:`sky130_fd_sc_ls__o22ai`
==============================

**2-input OR into both inputs of 2-input NAND**

*This is a stub of cell description file*

-  **Cell name**: :cell:`sky130_fd_sc_ls__o22ai`
-  **Type**: cell
-  **Verilog name**: sky130_fd_sc_ls__o22ai
-  **Library**: sky130_fd_sc_ls
-  **Inputs**:  4 (A1, A2, B1, B2)
-  **Outputs**: 1 (Y)

:cell:`sky130_fd_sc_ls__o22ai` symbols
--------------------------------------

.. list-table:: 

    * - .. figure:: sky130_fd_sc_ls__o22ai.symbol.svg
      -
      - .. figure:: sky130_fd_sc_ls__o22ai.pp.symbol.svg

:cell:`sky130_fd_sc_ls__o22ai` schematic
----------------------------------------

.. figure:: sky130_fd_sc_ls__o22ai.schematic.svg
    :align: center

:cell:`sky130_fd_sc_ls__o22ai` GDSII layouts
--------------------------------------------



.. figure:: sky130_fd_sc_ls__o22ai_1.svg
    :align: center
    :width: 50%

    sky130_fd_sc_ls__o22ai_1


.. figure:: sky130_fd_sc_ls__o22ai_2.svg
    :align: center
    :width: 50%

    sky130_fd_sc_ls__o22ai_2


.. figure:: sky130_fd_sc_ls__o22ai_4.svg
    :align: center
    :width: 50%

    sky130_fd_sc_ls__o22ai_4