:cell:`sky130_fd_sc_hs__fa`
===========================

**Full adder**

*This is a stub of cell description file*

-  **Cell name**: :cell:`sky130_fd_sc_hs__fa`
-  **Type**: cell
-  **Verilog name**: sky130_fd_sc_hs__fa
-  **Library**: sky130_fd_sc_hs
-  **Inputs**:  3 (A, B, CIN)
-  **Outputs**: 2 (COUT, SUM)

:cell:`sky130_fd_sc_hs__fa` symbols
-----------------------------------

.. list-table:: 

    * - .. figure:: sky130_fd_sc_hs__fa.symbol.svg
      -
      - .. figure:: sky130_fd_sc_hs__fa.pp.symbol.svg

:cell:`sky130_fd_sc_hs__fa` schematic
-------------------------------------

.. figure:: sky130_fd_sc_hs__fa.schematic.svg
    :align: center

:cell:`sky130_fd_sc_hs__fa` GDSII layouts
-----------------------------------------



.. figure:: sky130_fd_sc_hs__fa_1.svg
    :align: center
    :width: 50%

    sky130_fd_sc_hs__fa_1


.. figure:: sky130_fd_sc_hs__fa_2.svg
    :align: center
    :width: 50%

    sky130_fd_sc_hs__fa_2


.. figure:: sky130_fd_sc_hs__fa_4.svg
    :align: center
    :width: 50%

    sky130_fd_sc_hs__fa_4