:cell:`sky130_fd_sc_hdll__xor2`
===============================

**2-input exclusive OR**

*This is a stub of cell description file*

-  **Cell name**: :cell:`sky130_fd_sc_hdll__xor2`
-  **Type**: cell
-  **Verilog name**: sky130_fd_sc_hdll__xor2
-  **Library**: sky130_fd_sc_hdll
-  **Inputs**:  2 (A, B)
-  **Outputs**: 1 (X)

:cell:`sky130_fd_sc_hdll__xor2` symbols
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.. list-table:: 

    * - .. figure:: sky130_fd_sc_hdll__xor2.symbol.svg
      -
      - .. figure:: sky130_fd_sc_hdll__xor2.pp.symbol.svg

:cell:`sky130_fd_sc_hdll__xor2` schematic
-----------------------------------------

.. figure:: sky130_fd_sc_hdll__xor2.schematic.svg
    :align: center

:cell:`sky130_fd_sc_hdll__xor2` GDSII layouts
---------------------------------------------



.. figure:: sky130_fd_sc_hdll__xor2_1.svg
    :align: center
    :width: 50%

    sky130_fd_sc_hdll__xor2_1


.. figure:: sky130_fd_sc_hdll__xor2_2.svg
    :align: center
    :width: 50%

    sky130_fd_sc_hdll__xor2_2


.. figure:: sky130_fd_sc_hdll__xor2_4.svg
    :align: center
    :width: 50%

    sky130_fd_sc_hdll__xor2_4