:cell:`sky130_fd_sc_hdll__decap`
================================

**Decoupling capacitance filler**

*This is a stub of cell description file*

-  **Cell name**: :cell:`sky130_fd_sc_hdll__decap`
-  **Type**: cell
-  **Verilog name**: sky130_fd_sc_hdll__decap
-  **Library**: sky130_fd_sc_hdll
-  **Inputs**:  0 ()
-  **Outputs**: 0 ()

:cell:`sky130_fd_sc_hdll__decap` symbols
----------------------------------------

.. list-table:: 

    * - .. figure:: sky130_fd_sc_hdll__decap.symbol.svg
      -
      - .. figure:: sky130_fd_sc_hdll__decap.pp.symbol.svg

:cell:`sky130_fd_sc_hdll__decap` schematic
------------------------------------------

.. figure:: sky130_fd_sc_hdll__decap.schematic.svg
    :align: center

:cell:`sky130_fd_sc_hdll__decap` GDSII layouts
----------------------------------------------



.. figure:: sky130_fd_sc_hdll__decap_12.svg
    :align: center
    :width: 50%

    sky130_fd_sc_hdll__decap_12


.. figure:: sky130_fd_sc_hdll__decap_3.svg
    :align: center
    :width: 50%

    sky130_fd_sc_hdll__decap_3


.. figure:: sky130_fd_sc_hdll__decap_4.svg
    :align: center
    :width: 50%

    sky130_fd_sc_hdll__decap_4


.. figure:: sky130_fd_sc_hdll__decap_6.svg
    :align: center
    :width: 50%

    sky130_fd_sc_hdll__decap_6


.. figure:: sky130_fd_sc_hdll__decap_8.svg
    :align: center
    :width: 50%

    sky130_fd_sc_hdll__decap_8